From 3b09bc5d8da2b26a4f2e1ee2971efd383ff8340e Mon Sep 17 00:00:00 2001 From: George Wright Date: Mon, 9 Dec 2024 20:43:38 -0800 Subject: [PATCH] Add logging to RTC --- WindCore/sa1100/rtc.cpp | 67 ++++++++++++++--------------------------- 1 file changed, 22 insertions(+), 45 deletions(-) diff --git a/WindCore/sa1100/rtc.cpp b/WindCore/sa1100/rtc.cpp index 6e2d503..12cb226 100644 --- a/WindCore/sa1100/rtc.cpp +++ b/WindCore/sa1100/rtc.cpp @@ -16,7 +16,7 @@ // #include "rtc.h" - +#include "logger.h" namespace SA1100 { @@ -44,36 +44,20 @@ void RTC::run() case STATUS_ALE_BIT: if (m_RTAR == m_RCNR) { - #if TRACE_RTC - g_log_file << "RTC: enable alarm: " << std::hex << m_RCNR << std::endl; - #endif - - m_RTSR |= STATUS_AL_BIT; + m_RTSR |= STATUS_AL_BIT; } break; case STATUS_HZE_BIT: - #if TRACE_RTC - g_log_file << "RTC: enable hz: " << std::hex << m_RCNR << std::endl; - #endif - m_RTSR |= STATUS_HZ_BIT; break; case (STATUS_ALE_BIT | STATUS_HZE_BIT): if (m_RTAR == m_RCNR) { - #if TRACE_RTC - g_log_file << "RTC: enable alarm: " << std::hex << m_RCNR << std::endl; - #endif - - m_RTSR |= STATUS_AL_BIT; + m_RTSR |= STATUS_AL_BIT; } - - #if TRACE_RTC - g_log_file << "RTC: enable hz: " << std::hex << m_RCNR << std::endl; - #endif - + m_RTSR |= STATUS_HZ_BIT; break; } @@ -98,13 +82,21 @@ uint32_t RTC::get_data(uint32_t const address) const switch (address) { - case RTAR: return m_RTAR; - case RCNR: return m_RCNR; - case RTTR: return m_RTTR; - case RTSR: return m_RTSR; + case RTAR: + LOG_REG_R("RTC RTAR", address, m_RTAR); + return m_RTAR; + case RCNR: + LOG_REG_R("RTC RCNR", address, m_RCNR); + return m_RCNR; + case RTTR: + LOG_REG_R("RTC RTTR", address, m_RTTR); + return m_RTTR; + case RTSR: + LOG_REG_R("RTC RTSR", address, m_RTSR); + return m_RTSR; default: - /*assert(!"Should not reach here.");*/ + LOG_REG_R("RTC Unknown", address, 0); return 0; } } @@ -114,38 +106,27 @@ void RTC::put_data(uint32_t const address, uint32_t const value) switch (address) { case RTAR: - #if TRACE_RTC - g_log_file << "RTC: set alarm: " << std::hex << value << std::endl; - #endif - + LOG_REG_W("RTC RTAR", address, value); m_RTAR = value; break; case RCNR: - #if TRACE_RTC - g_log_file << "RTC: set RCNR: " << std::hex << value << std::endl; - #endif - + LOG_REG_W("RTC RCNR", address, value); m_RCNR = value; break; case RTTR: + LOG_REG_W("RTC RTTR", address, value); // :NOTE: Wei 2004-Jun-06: // // I don't support RTC Trim Procedure yet. // Thus just let it pass by. - #if TRACE_RTC - g_log_file << "RTC: Trim Procedure, using " << value << std::endl; - #endif m_RTTR = (value & 0x3FFFFFF); break; case RTSR: - #if TRACE_RTC - g_log_file << "RTC: setting RTSR: orig: " << std::hex << m_RTSR << ", value: " << value << std::endl; - #endif - + LOG_REG_W("RTC RTSR", address, value); // :SA-1110 Developer's Manual: p.90, p.91: Wei 2003-Dec-09: // // Each status bit may be cleared by writing a one to the status register in the desired bit position. @@ -154,14 +135,10 @@ void RTC::put_data(uint32_t const address, uint32_t const value) // ... // All reserved bits are read as 0s and are unaffected by writes. m_RTSR &= ~(value & STATUS_VALID_BIT_MASK); - - #if TRACE_RTC - g_log_file << "RTC: setting RTSR: new: " << std::hex << m_RTSR << std::endl; - #endif break; default: - /*assert(!"Should not reach here.");*/ + LOG_REG_W("RTC Unknown", address, value); break; } } -- 2.45.2