nextTickAt = TICK_INTERVAL;
nextRTCTick = 0;
+ nextTimerTick = 0;
memoryConfig.reset();
setProcessorID(0x4401A111);
powerManager->reset();
pendingInterrupts |= (1<<TINT);
asic14->tick();
}
- if (passedCycles % TICKS_3_6864_MHZ == 0) {
+ if (passedCycles >= nextTimerTick) {
osTimer->tick();
+ nextTimerTick += TICKS_3_6864_MHZ;
}
if (passedCycles >= nextRTCTick) {
printf("RTC tick\n");
uint16_t lastSSIRequest = 0;
int ssiReadCounter = 0;
uint32_t nextRTCTick = 0;
+ uint32_t nextTimerTick = 0;
uint32_t kScan = 0;
uint8_t keyboardColumns[8] = {0,0,0,0,0,0,0};
m_SPI_DATA = 0;
m_SPI_FN = 0;
m_STATUS6 = (1 << 1) | (1 << 10) | (1 << 11);
+ pinState = false;
}
void ASIC14::run() {}
private:
uint8_t prom[0x80] = {};
+ bool pinState;
int mCurrPlace = 0;
GPIOController* mGPIOController;
enum
//m_IRQ_STATUS = IRQ_CFCARD_CHANGE | IRQ_PCMCIA_CHANGE;
m_IRQ_STATUS = m_IRQ_MASK;
if (m_IRQ_STATUS != 0) {
- mGPIOController->pull_pin(10, false);
+ if (pinState == false) {
+ // Go high for one cycle, then low next cycle.
+ mGPIOController->pull_pin(10, true);
+ pinState = true;
+ } else {
+ mGPIOController->pull_pin(10, false);
+ pinState = false;
+ }
} else {
mGPIOController->pull_pin(10, true);
+ pinState = true;
}
}
};
// GEDR status bits are cleared by writing a one to them.
// Writing a zero to a GEDR status bit has no effect.
m_GEDR &= ~(value & 0xFFFFFFF);
- // Probably not the best way to handle this, as reading GPLR will result in incorrect
- // data
- m_GPLR &= ~(value & 0xFFFFFFF);
- m_GPLR_backup &= ~(value & 0xFFFFFFF);
//printf("GEDR write %08x [%08x]\n", value, m_GEDR);
break;
inline void run() {
uint32_t const temp = m_GPLR ^ m_GPLR_backup;
-
+
if (temp != 0) {
m_GEDR |= (m_GRER & (m_GPLR & temp));
m_GEDR |= (m_GFER & (m_GPLR_backup & temp));